Just in case anybody wants to know how the story ends, ValleyBell decided that to retain compatibility with existing packs made with the misunderstanding about MAME's mask values, VGM's LFSR width == MAME's feedback mask and VGM's feedback mask == MAME's tap points. The spec has been updated accordi...

Okay, I talked to Lord_Nightmare and got the answers I needed. The feedback mask is not the same thing as the number of LFSR bits, it's the LFSR bits + latency bits. So-called "17-bit" chips are 15-bit chips that have 2 bits of latency, as can be seen by the tap masks of 4 and 8 rather tha...

I'm working with the VGM format and I'm very confused by the SN76489 series LFSR bit count, which is apparently based directly on MAME's implementation. As I understand it, real SN76489-series chips are 15-bit LFSR and some custom versions are 16-bit. But in MAME some discrete chips have a feedback ...